The present invention relates to a solid state image pickup device.
In recent years, the trend in two-dimensional solid state image pickup devices is towards a remarkable increase in the number of picture elements incorporated and the marked advancement of the miniaturization of a chip size, and these changes which have brought about the micronization of wiring patterns In two-dimensional solid state image pick up devices, a vertical driving pulse is generally applied in each transfer electrode of the vertical registers through two layers of aluminum wiring, each of which is electrically connected to the transfer electrode at each end of an image area. However, since each transfer electrode of the vertical registers is usually made up of polysilicon, the micronization of the wiring patterns tends to bring about increased electrical resistance of the transfer electrode and, consequently, the waveform of the vertical driving pulse which is applied to the transfer electrode at both ends of the image area deteriorates as the pulse moves away from the ends to the center of the image area. Since the waveform deterioration of the vertical driving pulse is likely to cause lowered transfer efficiency and a resulting decrease in the amount of electric charge being transferred, it may be one of the factors limiting the acceleration of the transfer velocity.
In order to help solve the problems described in the preceding paragraph, the two-dimensional solid state image pickup device shown in FIG. 1A and FIG. 1B is proposed in the paper which appeared on page 214 of the ISSCC DIGEST OF TECHNICAL PAPERS 1990. This device is of the buried channel type which comprises a sheet of silicon substrate 1 and a buried channel 2 of silicon which has the opposite conductivity type from the silicon substrate 1. The transfer of electrical charge in the vertical direction is achieved by means of a set of vertical registers driven by four phased vertical driving pulses .PHI..sub.1 -.PHI..sub.4. Each vertical register comprises a transfer channel, a group of first-layer transfer electrodes, another group of second-layer transfer electrodes, an intermediate layer of polysilicon, an aluminum wiring layer, a plurality of first contacts and a plurality of second contacts. As an example, the vertical register shown on the extreme right-hand side in FIG. 1A comprises a transfer channel (not shown in the figure for simplicity), a group of first-layer transfer electrodes 10-12, another group of second-layer transfer electrodes 20-22, an intermediate layer 44 of polysilicon, an aluminum wiring layer 64, a plurality of first contacts 30 and a plurality of second contacts 50 (only one or two of each of these contacts are shown in the figure for the sake of simplicity). Both the group of transfer electrodes 10-12 and the other group of transfer electrodes 20-22 are made up of polysilicon and are formed onto the buried layer 2 through a gate oxide layer 3 across the transfer channel shown in FIG. 1B. The intermediate layer 44 is formed onto both the group of transfer electrodes 10-12 and the other group of transfer electrodes 20-22 through a gate oxide layer along the transfer channel. The aluminum wiring layer 64 is formed onto the intermediate layer 44 through a gate oxide layer along the transfer channel and, concurrently, serves as the light shield for the vertical register. In this vertical register, the first component of the vertical driving pulses .PHI..sub.1 is applied to the alternately located half of the group of first-layer transfer electrodes 10, 12. The third component of the vertical driving pulses .PHI..sub.3 is applied to the remaining half of the same group of first-layer transfer electrodes 11. The second component of the vertical driving pulses .PHI..sub.2 is applied to the alternately located half of the other group of second-layer transfer electrodes 20, 22. The fourth component of the vertical driving pulses .PHI..sub.4 is applied to the remaining half of the other group of second-layer transfer electrodes 21.
The application of the first component of the vertical driving pulses .PHI..sub.1 to the alternately located half of the group of transfer electrodes 10, 12 is achieved by supplying the first component of the vertical driving pulses .PHI..sub.1 from the aluminum wiring layer 64 to each transfer electrode 10, 12 through the intermediate layer 44. This is required to prevent the waveform degradation of the first component of the vertical driving pulses .PHI..sub.1. For this reason, the transfer electrode 10 and the intermediate layer 44 are electrically connected by forming one of the first contacts 30 shown in FIG. 1A on the transfer channel and on the transfer electrode 10. Similarly, the transfer electrode 12 and the intermediate layer 44 are electrically connected by forming another one of the first contacts 30 also shown in FIG. 1A on the transfer channel and on the transfer electrode 12. Furthermore, by forming one of the second contacts 50 also shown in FIG. 1A on the transfer channel and on the transfer electrode 21, the intermediate layer 44 and the aluminum wiring layer 64 are electrically connected.
Referring to the vertical register located next to the extreme left-hand side in FIG. 1A, the application of the second component of the vertical driving pulses .PHI..sub.2 to the transfer electrode 21 is achieved likewise by electrically connecting the aluminum wiring layer 61 and the transfer electrode 21. Referring to the vertical register located in the center in FIG. 1A, the application of the third component of the vertical driving pulses .PHI..sub.3 to the transfer electrode 11 is achieved in a similar manner by electrically connecting the aluminum wiring layer 62 and the transfer electrode 11. Referring to the vertical register located second from the extreme right-hand side in FIG. 1A, the application of the fourth component of the vertical driving pulse .PHI..sub.4 to the transfer electrodes 22 is achieved in a similar manner by electrically connecting the aluminum wiring layer 63 and the transfer electrode 22.
The reason why the first component of the vertical driving pulses .PHI..sub.1 is supplied from the aluminum wiring layer 64 to the transfer electrode 10 through the intermediate layer 44 is to prevent the occurrence of undesirable effects such as lower transfer efficiency and reduced amount of the transferred electrical charge. To explain in more detail, when the aluminum wiring layer 64 and the transfer electrode 10, which is made up of polysilicon, are electrically connected through the electrical contact on the transfer channel, aluminum and polysilicon are partially alloyed at the junction. Consequently, a potential difference appears between the part of the transfer electrode 10 at the contact and the remaining part of the transfer electrode 10, and this difference results in detrimental effects such as lower transfer efficiency and a reduction of the amount of transferred electric charge.
However, in conventional two-dimensional solid state image pickup devices, one of the first contacts 30 is located on the transfer electrode 10 where the first component of the vertical driving pulses .PHI..sub.1 is applied, and one of the second contacts 50 is located on the transfer electrode 21 where the second component of the vertical driving pulses .PHI..sub.2 is applied. Therefore, there is a potential for electrical short circuits between the transfer electrode 10 and the transfer electrode 21 for the reasons explained below:
(1) The aluminum wiring layer 64 and the transfer electrode 21 may electrically short circuit to each other. This could occur when the electrode pattern masks are optically misregistrated in the course of chip manufacture or when the second contacts 50 are for some reason not properly aligned with the location off the intermediate layer 44.
(2) The aluminum wiring layer 64 and the transfer electrode 21 may electrically short circuit to each other if electrical breakdown should occur between the intermediate layer 44 and the transfer electrode 21 at the contacts 50 where aluminum and polysilicon could be alloyed.